The various signal busses which are used in personal computers, laptop computers, battery-operated surveillance equipment, various types of military hardware, and the like, increasingly are required to operate at high speed and to consume as little power as possible. A widely used high-speed bus terminator has a plurality of resistor-only networks interconnecting the two bus pins of the terminator circuit. The junctions between different pairs of "pull-up" and "pull-down" resistors then are coupled to the circuit termination pins of the system using the terminator circuit.
The circuits connected to the termination pins frequently are CMOS TTL circuits, many of which require a standby voltage at the pin to which they are connected. This is provided by such a resistor network by the constant dissipation of power through the bus terminator circuit. A continuous current flow takes place through the two resistors for each of the circuit termination pins.
A problem with this type of circuit, however, is that this continuous standby current of the bus terminator circuit dissipates a substantial amount of power. In many operations, several bus terminator circuits exist; and each of these terminator circuits continuously consume power in the standby condition. In addition, when the circuit termination pins are actively driven by the circuits connected to them, a significant additional amount of power is dissipated; so that irrespective of the operation of the system using the bus terminator circuit, power is dissipated in a significant amount at all times. For battery-operated devices, this results in a relatively rapid discharge of the battery. A system of this general type is disclosed in the patent to Risher U.S. Pat. No. 4,626,804. The full direct current path is present in the standby condition of operation, and the system of this patent simply adds a power supply de-coupling capacitor to the resistor-resistor terminator circuit.
Another approach, which has been employed to eliminate the consumption of power during standby conditions of operations, is disclosed in the patent to Feinberg U.S. Pat. No. 4,553,050. The terminator circuit of this patent blocks the high current direct current path with capacitors to cause "Zero" power consumption during standby operation of the terminator circuit. A problem with the circuit of Feinberg, however, is that the capacitors leave the circuit termination pins floating during the quiescent condition of operation, when no active drivers are connected to the circuit termination pins. Thus, the quiescent voltage on the termination pins is indeterminate, and for CMOS circuits this is dangerous, since many CMOS circuits require a fixed standby voltage at the pin to which they are connected. Consequently, the system of the patent to Feinberg cannot be used for such CMOS circuits.
It is desirable to provide a bus terminator circuit which minimizes the dissipation of power during standby and active operation, which maintains a pre-established standby voltage on the circuit termination pins, which is capable of high-speed operation, and which overcomes the shortcomings of the prior art.